Anchor Semiconductor offers dynamic and challenging work opportunities in a fast-growing market segment of EDA industry.

We are looking for exceptional individuals with physical design tool applications, development and IC fabrication background.

Please submit your resume to: hr@anchorsemi.com

Current Openings:

Research & develop application for EDA (Electronic Design Automation) using C, C++ & Tcl in Unix/X-Window environment. Perform Integrated Circuit Computer Aided Design. Develop new EDA tools, research and develop lithography process modeling algorithms for layout patterning simulation. Design and implement computational geometry  and computer graphics algorithms for IC layout operation, such as layout pattern matching, polygon resizing and layout boolean operation. Research, design and develop algorithms and applicable programs for IC layout correction including Optical Proximity Correction, Phase Shifter Mask and Sub-Resolution Assistant Feature generation etc. Research and develop algorithms and computer applications for high-yield IC design and manufacturing. Design, implement and support programs for very large scale layout database handling, develop and design computer applications for handling GDSII and OASIS layout data files. Develop, support and maintain graphical user interface for layout debugging and display. Set up diagnostic routines for applications. Maintain and support existing layout tools as needed.

MSEE+ 2 yrs. pre or post graduate experience.

Job responsibility

• Develop mission-critical applications using Anchor's advanced tools and technologies; solve leading-edge customers' pressing problems in OPC/RET and DFM areas.
• Act as a project manager for solving customers' technical issues and facilitating quick adoption of Anchor's solutions.
• Work in a dynamic, cross-functional team with sales, marketing, and R&D to achieve business objectives; must be a team player.
• Develop and maintain customer relationship.

Job requirements

• 3+ years of industry experience in related fields (EDA industry is desirable), with strong interpersonal and communication skills, a self-starter and quick learner.
• Hands on experience in RET/OPC or mask synthesis flow.
• Good understanding in some of the following areas: physical design and verification, semiconductor manufacturing process, especially the patterning process, OPC modeling, post-OPC verification, and tapeout operation.
• Skilled in scripting and programming in Unix/Perl/Cshell/C/C++/Tcl/Tk environment.
• BS degree in EE, CS, or related technical fields.
• Moderate level of travel is required.
• US resident or citizen is preferred