Publications
Systematic Failure Debug and Defective Pattern Extraction for FPGA Product Yield Improvement, SPIE Vol. 7641 (2010)
Detection of OPC Conflict Edges through MEEF Analysis, SPIE Vol. 7641 (2010)
A Kernel-based DfM Model for Process from Layout to Wafer, SPIE Vol. 7641 (2010)
Hotspot Management through Design Based Metrology—Measurement and Filtering, SPIE Vol. 7520 (2009)
Simulation based Mask Defect Repair Verification and Disposition, SPIE Vol. 7488 (2009)
Systematic Defect Filtering and Data Analysis Methodology for Design Based Metrology, SPIE Vol. 7272 (2009)
Design for Manufacturability Guideline Development: Integrated Foundry Approach, SPIE Vol. 7122 (2008)
Combination of rule and pattern based lithography unfriendly pattern detection in OPC flow, SPIE Vol. 7122 (2008)
Improvement on OPC completeness through pre-OPC hot spot detection and fix, SPIE Vol. 6925 (2008)
A Procedure to Back-annotate Process Induced Layout Dimension Changes into the Post Layout Simulation Netlist, SPIE Vol. 6924 (2008)
Pattern Centric OPC Flow: a Special RET Flow with Fast Turn-Around-Time, SPIE Vol. 6924 (2008)
A Feasible Model-Based OPC Algorithm Using Jacobian Matrix of Intensity Distribution Functions, SPIE Vol. 6520 (2007)
Distributed model calibration using Levenberg-Marquardt algorithm, SPIE Vol. 6520 (2007)
DFM: A Practical Layout Optimization Procedure for the Improved Process Window for an Existing 90-nm Product, SPIE Vol. 6156 (2006)
Post-OPC verification using a full-chip Pattern-Based simulation verification method, SPIE Vol. 5992 (2005)
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